Verdict for new designs: The AST2500 is superior for legacy LPC (Low Pin Count) interfaces and extreme temperature ranges (-40°C to +105°C vs AST2600's -20°C to +95°C).
The AST2500 includes an ECC-enabled SPI flash controller. However, the original documentation was ambiguous. The new revision provides explicit code examples for initializing ECC regions for the boot loader. Failure to follow the "new" sequence results in a 30% chance of boot failure after power cycling due to "Flash Uncorrectable Error" flags.
Does the new datasheet hint at an AST2500+? Indirectly, yes. ASPEED has confirmed via the new datasheet's "Ordering Information" section that the (active) and AST2500L-A2 (industrial temp) are the final silicon steppings. No A3 is expected.
If you have an AST2500 on your bench and it isn't working, the "new" datasheet likely has the answer.
"The BMC boots fine, but I lose network connectivity after 48 hours." Solution (New Sheet): On page 342 (RMII/RGMII Interface), the new datasheet adds a footnote: "MAC1 auto-negotiation should be disabled if PHY clock drift exceeds 50ppm." The old sheet omitted this.
| Feature | AST2500 (New Datasheet) | AST2600 | | :--- | :--- | :--- | | | ARM9 (32-bit) | ARM11 (64-bit) | | Max DDR Speed | 1600 MT/s | 3200 MT/s | | PCIe Lanes | 1x Gen2 | 2x Gen3 | | MCTP Support | Software-based | Hardware offload | | Die Temperature | Max 105°C | Max 95°C (Tighter limit) |
Verdict for new designs: The AST2500 is superior for legacy LPC (Low Pin Count) interfaces and extreme temperature ranges (-40°C to +105°C vs AST2600's -20°C to +95°C).
The AST2500 includes an ECC-enabled SPI flash controller. However, the original documentation was ambiguous. The new revision provides explicit code examples for initializing ECC regions for the boot loader. Failure to follow the "new" sequence results in a 30% chance of boot failure after power cycling due to "Flash Uncorrectable Error" flags. aspeed ast2500 datasheet new
Does the new datasheet hint at an AST2500+? Indirectly, yes. ASPEED has confirmed via the new datasheet's "Ordering Information" section that the (active) and AST2500L-A2 (industrial temp) are the final silicon steppings. No A3 is expected. Verdict for new designs: The AST2500 is superior
If you have an AST2500 on your bench and it isn't working, the "new" datasheet likely has the answer. The new revision provides explicit code examples for
"The BMC boots fine, but I lose network connectivity after 48 hours." Solution (New Sheet): On page 342 (RMII/RGMII Interface), the new datasheet adds a footnote: "MAC1 auto-negotiation should be disabled if PHY clock drift exceeds 50ppm." The old sheet omitted this.
| Feature | AST2500 (New Datasheet) | AST2600 | | :--- | :--- | :--- | | | ARM9 (32-bit) | ARM11 (64-bit) | | Max DDR Speed | 1600 MT/s | 3200 MT/s | | PCIe Lanes | 1x Gen2 | 2x Gen3 | | MCTP Support | Software-based | Hardware offload | | Die Temperature | Max 105°C | Max 95°C (Tighter limit) |